There is considerable ongoing discussion on how to contain exponentially increasing test costs for systems-on-chip (SoCs) and microprocessors. As the transistor geometry shrinks and more transistors ...

Testing multiple devices in parallel using the same ATE results in reduced test time and lower costs, but it requires engineering finesse to make it so. Minimizing test measurement variation for each ...

Time is money in electronics, as in other industries, and the more time that is invested in testing chips means more costs being added to the product in question. To speed up testing for memory ...

SAN FRANCISCO &#151 During the Semicon West trade show, Agilent, Credence and Electroglas separately rolled out automatic test equipment (ATE) solutions to attack chip-testing costs. Electroglas Inc.

It should come as no surprise that Moore's Law of regularly doubling chip capacity is having an impact on automatic test equipment (ATE) for ICs. ATE, of course, applies patterns of signals and checks ...