Nasdaq

Cadence Advances Hyperscale SoC Design with Expanded IP Portfolio for TSMC N3E Process Featuring Next-Generation 224G-LR SerDes IP

Proven interface IP architectures realized significant gains in performance and power efficiency on the TSMC N3E process 224G-LR SerDes PHY IP on the TSMC N3E process has achieved first-pass silicon ...
Electronic Products & Technology

SoC built on 12nm platform using TSMC N12e process

AMBIQ MICROAtomiq SoC is built on firm’s 12nm SPOT platform using the TSMC N12e process, introducing a new Ultra-Low-Power (ULP) mode engineered to operate as ...
EDN

SoC design: What’s next for NoCs?

Today’s high-end system-on-chips (SoCs) rely heavily on sophisticated network-on-chip (NoC) technology to achieve performance and scalability. As the demands of artificial intelligence (AI), ...
SDxCentral

Synopsys 5G SoC enhances 5G development with new RF design flow for TSMC N6RF process

RFICs (Radio Frequency Integrated Circuits) for wireless data transmission systems, such as transceivers and RF front-end components, are becoming more complex based on the demands of our connected ...
Semiconductor Engineering

Why SoC Designers Need Purpose-Built Semiconductor IP Catalog Tools

Semiconductor intellectual property (IP) management, reuse, and change tracking are essential for efficiently creating chip designs based on proven building blocks, reducing your time-to-market, and ...
Semiconductor Engineering

Streamlining SoC Design With Advanced IP And Integration Solutions

As system-on-chip (SoC) complexity grows, so does the necessity for products that seamlessly connect IP and streamline integration processes, minimize manual errors, and enhance productivity. The ...
EDN

Automated tool suite speeds SoC design

You can spend a month hand-crafting the last few hundred square microns of silicon out of a SoC (System-on-Chip) design, or you can put your product on the market one month quicker. Forget the ...
Electronic Design

Predictive SoC Floorplanning Using Artificial Intelligence

Pain points of the existing floorplan designing process. How artificial intelligence can optimize this process to reduce the time taken from weeks to just hours. Potential applications of expanding ...
Business Wire

Silicon Creations’ SerDes Technology Designed into Novatek 8K TV SoC on TSMC 12nm Process

LAWRENCEVILLE, Ga.--(BUSINESS WIRE)--Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), announced today that its Deserializer PMA (Physical ...