A smaller version of existing 16nm technology According to industry sources, TSMC is planning to introduce a 12 nanometer half-node process to enhance competition with 28nm and lower process nodes… A ...

TOKYO/TAIPEI, Feb 5 (Reuters) - TSMC plans to mass produce advanced 3-nanometre chips in Kumamoto in southern Japan, TSMC CEO ...

HAIFA, Israel--(BUSINESS WIRE)--proteanTecs®, a global leader in advanced analytics for semiconductor health and performance monitoring, today announced the successful silicon-proven validation of its ...

Apple is expected to use TSMC's base 2-nanometer N2 process rather than the newer N2P variant for its upcoming A20 and M6 ...

Accelerates Pathway to Ultra High-Speed 1.6Tbps Bandwidth for Build Out of the Next Generation of Cloud Computing, AI, and Hyperscale Networks SAN JOSE, Calif.--(BUSINESS WIRE)-- Credo Technology ...

To meet the surging demand driven by AI, TSMC is upgrading its second wafer fab under construction in Kumamoto, Japan, to use ...

Vanguard International Semiconductor (VIS) announced on 28 January that it had signed a technology licensing agreement with TSMC covering 650V high-voltage and 80V low-voltage GaN process technologies ...

Intel's newest CEO, Lip Bu-Tan, took the helm in March 2025 and doubled down on its commitment to manufacturing its own chips ...

TSMC’s record Q4 revenue surges on smartphone and AI demand, with a fast 2026 ramp expected. Read the latest analysis on the ...

The new 224G PAM4 IP offering brings Credo’s high-performance, power-efficient SerDes technologies with fabrication on an industry-leading advanced process technology from TSMC to provide the ...