IEEE

FPGA Design and Implementation of BCH Encoders and Decoders Using Pipelined Architecture for High Throughput Applications

This paper presents the design and FPGA implementation of a high-throughput BCH (n,k) encoder and decoder using a fully pipelined architecture. Unlike conventional designs based on finite state ...
GitHub

Dora: Sampling and Benchmarking for 3D Shape Variational Auto-Encoders

Note: We have recently found that Dora-VAE can specify tokens of any length during inference, even if this length has not been seen during training. During inference, you could use a latent code ...
IEEE

A Siamese Encoder-Decoder Model with Attention for LLM Prompt Reconstruction

Abstract: Reconstructing prompts in text generation systems is a significant challenge in natural language processing (NLP). This study presents a novel Siamese encoder-decoder framework augmented ...
GitHub

ECG-Based Sleep Apnea Detection

This repository is associated with the manuscript submitted to the Visual Computer and provides an implementation for ECG-based sleep apnea detection using: RRI and RPA feature extraction from ...